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Renesas Electronics /R7FA6M3AH /JPEG /JIFESLC

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Interpret as JIFESLC

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LINES

Description

JPEG Interface Compression Source Line Count Register

Fields

LINES

Number of Input Image Data Lines to be Read (in 8-line units) The lower three bits should be set to 0.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data